1. Field of the Invention
The present invention is related to a memory device which tracks timing constraints, and more particularly, to a memory device with bi-directional tracking of timing constraints.
2. Description of the Prior Art
Random access memory is a data storage device categorized into two types: static random access memory (SRAM) and dynamic random access memory (DRAM). In DRAM, each memory cell includes a transistor and a capacitor. The capacitor may either be charged or discharged. The transistor may function as a switch which allows a peripheral control circuit to access or change the status of the capacitor. Due to capacitor charge leakage, DRAM is required to periodically execute refresh operation in order to maintain accurate data.
After a DRAM receives a specific command, an execution time is required to complete the corresponding operation, after which a waiting period is required in order to guarantee that the next command can accurately be received. The above execution time and the waiting time can be defined by various timing constraints which need to be satisfied when operating the DRAM. The operation of DRAM generally involves many timing constraints with different restricting durations. For each timing constraint, a corresponding uni-directional tracking circuit is disposed in the prior art in order to improve the efficiency of the controller. However, using a large number of uni-directional tracking circuits may increase design complexity and manufacturing costs. In another prior art, a simple controller can be used by applying the loosest timing constraint, but the overall operational efficiency may be downgraded.